Integrated circuits have revolutionized virtually all areas of human activity. Although the processes for manufacturing integrated circuits are extremely complex and expensive, manufacturers have developed mass production techniques to reduce the costs per integrated circuit (unit cost) to a few dollars for most circuits. As a result, millions of integrated circuits are incorporated into a diverse array of consumer, industrial, and military products each year.
However, the integrated circuit manufacturing industry is one of the most competitive in the world. Even a small increase or decrease in a manufacturer's unit cost can have a dramatic impact on the maiiufacturer's profits or market share. To remain competitive in this market, integrated circuit manufacturers must continuously strive to reduce their unit cost by increasing both yield and throughput.
Yield is a measure of the number of integrated circuits which are free of fatal defects (i.e., defects which prevent the circuit from functioning properly). Integrated circuits are typically manufactured on semiconductor wafers. Depending on the relative sizes of the wafer and integrated circuit, a single wafer may contain from just a few, to hundreds of integrated circuits. Yield is usually expressed as the average percentage of integrated circuits per wafer which are free of fatal defects. Yield may be measured at the end of a particular processing step, or may be measured at the end of the entire manufacturing process. In either case, a higher yield means that manufacturing costs are spread over a larger number of integrated circuits, thus reducing the unit cost.
Throughput is a measure of the number of integrated circuits which are manufactured in a particular time period. Throughput is sometimes expressed as the number of `wafers per hour` which are cycled through a particular process such as an epitaxial reactor. If the throughput of an epitaxial reactor is increased, then fewer reactors are needed to process a given number of wafers, thus saving capital equipment expenditures and reducing the unit cost.
Unfortunately, yield and throughput can be conflicting goals. Modifications to the manufacturing process that are intended to increase throughput often result in lower yield, and vice versa. As a result, manufacturers typically must make compromises between maximum yield and maximum throughput to minimize their unit cost. One integrated circuit manufacturing process in which this yield versus throughput conflict arises is epitaxy.
Epitaxy generally involves the growth or deposition of a single-crystal layer of semiconductor material on the surface of a semiconductor substrate of the same material such that the epitaxial layer has the same crystal orientation as the underlying substrate. Many modern integrated circuits are foamed in epitaxial semiconductor layers on a semiconductor substrate rather than in the substrate itself. Therefore, growth of high quality epitaxial layers (epi layers) at low cost is an important goal for many integrated circuit manufacturers.
Two important characteristics which determine the quality of an epi layer, and thus the yield of the manufacturing process, are the number of crystallographic defects and the transition width. Crystallographic defects are non-uniformities in the crystal structure of the epi layer. Many of these crystallographic defects are caused by defects or impurities in the substrate surface which then propagate into the epi layer during epitaxial growth. Stacking faults are a common example of such crystallographic defects which can cause operating failures in circuits formed in the epi layer. Thus, a reduction in these defects may increase yield.
The transition width describes the thickness of the region of the epi layer adjacent the substrate where the dopant concentration is higher or lower than in the remainder of the epi layer due to diffusion of dopants into and/or out of the substrate. If the transition width extends into the area of the epi layer in which circuits are formed, the circuits may not function properly. Thus, a reduction in transition width may increase yield.
One of the most effective ways to reduce the cost of an epitaxy process step is to increase the throughput of the epitaxial reactor by increasing the growth rate of the epi layer. A higher growth rate means reducing the time needed to grow an epi layer of a particular thickness, which allows more wafers to be processed in a given time period.
However, increased growth rates typically lead to increased defects in the epi layer. Further, one of the primary techniques for increasing the growth rate--raising the temperature of the substrate during growth--causes increased dopant diffusion, thereby increasing the transition width. As a result, manufacturers often must compromise between high throughput and high yield to minimize their unit costs.
Therefore, it would be desirable to have a process for growing an epitaxial semiconductor layer at a high growth rate to maximize throughput, while also maximizing yield by reducing the number of crystallographic defects and the transition width. Such a process could significantly reduce a manufacturer's unit cost.